I. Field of the Invention
This invention relates generally to interfacial superconductivity. In particular, the present invention relates to the formation of an ultrathin and stable superconducting layer at the interface between two materials. This invention further relates to the utilization of such a superconducting interface in electronic devices.
II. Background of the Related Art
The discovery of a class of copper-oxide ceramics or cuprates in 1986 which exhibit superconductivity with transition temperatures (Tc) higher than the boiling point of liquid nitrogen (77 K) resulted in renewed interest in layered superconductors. These so-called high-temperature superconductors (HTS) possess a crystal structure which is intrinsically multi-layered; metallic CuO2 layers are stacked in an alternating sequence with insulating metal oxide layers. In the cuprates, the metal oxide layers are generally regarded as charge-reservoir blocks which provide mobile charges to the CuO2 layers. Some examples of typical native metal oxide-CuO2 superlattices include structures comprising Y and BaO layers in YBa2Cu3O7 (YBCO), Bi2Sr2O4 layers in Bi2Sr2CuO6 (Bi-2201), and (La, Sr)2O2 layers in La2−xSrxCuO4 (LSCO). An introductory review of high-temperature superconductors is provided, for example, by M. Cyrot and D. Pavuna in “Introduction to Superconductivity and High-Tc Materials,” World Scientific, NJ (1991) the entire contents of which is incorporated by reference.
The realization that superconducting cuprates are comprised of layered crystal structures led to an interest in synthesizing artificial HTS and related complex oxides by atomic-layer engineering (ALE). The development and utilization of ALE is described, for example, by I. Bozovic (hereinafter “Bozovic”) in “Atomic-Layer Engineering of Superconducting Oxides: Yesterday, Today, Tomorrow,” IEEE Trans. Appl. Supercond. 11, 2686 (2001) which, along with the references cited therein, is incorporated by reference as if fully set forth in this specification. In general, ALE is defined as the controlled deposition of sequential thin films of different materials with thicknesses which may span only a few atomic layers. Growth is switched between materials with atomic-level control on the order of a few percent of an atomic monolayer (ML) or better.
Growth of HTS and related oxides has been accomplished predominantly by shuttered molecular beam epitaxy (MBE) although a variety of other techniques such as sputtering and pulsed laser deposition (PLD) have also been used to deposit high-quality superconducting layers. During MBE, a number of elemental sources containing the desired constituents (e.g., La, Sr, Cu, etc.) are situated within a vacuum chamber. The sources are each heated by means of separate effusion cells or e-beam guns to produce and direct the desired flux of atoms onto a substrate. The absolute rate of deposition of each element is accurately controlled and individual atomic beams may be turned on or off at precise intervals by the removal or insertion of a mechanical shutter. The surface chemistry of the deposited film can then be controlled by varying the shuttering sequence which may include concurrent deposition of two or more elements for specified time periods.
A variety of approaches which employ ALE have been followed in attempting to fabricate novel superconducting materials and interfaces. These include, for example, varying the crystallographic structure and orientation of the underlying substrate and controlling the growth kinetics by varying the shuttering intervals and sequence as well as the growth temperature. ALE has been used to successfully fabricate single-crystal, defect-free films of LSCO, YBCO, Bi-2201, Bi2Sr2CaCu2O8 (Bi-2212) as well as Bi-2201/Bi-2212 and YBCO/PrBa2Cu3O7 superlattices. Some of the first artificial HTS compounds of Bi2Sr2Ca7Cu8O20 and (BaCuO2)2(SrCuO2)n have also been produced by ALE.
The realization of zero electrical resistance and perfect diamagnetism makes HTS-based electronic devices especially attractive. As a result, considerable research effort has been directed toward the development of electronic devices capable of exploiting the advantages inherent to superconducting materials. Despite advances in the ALE of HTS, the development of commercially viable electronic devices and integrated circuits which utilize HTS materials has been met with limited success. Many of these devices have been based on the Josephson effect which pertains to current flow between two superconductors which are separated by a very thin insulating barrier in the absence of an applied voltage. Such a structure is known as a Josephson junction (JJ) and has formed the basis for high-speed switching elements and ultrasensitive detectors. The formation of HTS JJs is described, for example, in U.S. Pat. No. 6,999,806 to Adachi, et al. which is incorporated by reference as if fully set forth in this specification.
A variety of electronic devices which incorporate superconducting materials in different forms have been developed. These include, for example, novel semiconductor-superconductor hybrid devices (U.S. Pat. Nos. 5,138,401; 5,326,988; and 5,455,451), superconducting field-effect transistors (SuFET; U.S. Pat. Nos. 5,240,906; 5,382,565; and 5,663,081), Josephson field-effect transistors (JoFET; U.S. Pat. No. 6,111,268), as well as superconductor-insulator-superconductor (SIS) and superconductor-normal metal-superconductor (SNS) tunnel junctions (U.S. Pat. Nos. 5,304,538; 6,999,806). Each of the aforementioned patents along with the references cited therein are incorporated by reference as if fully set forth in this specification. Although HTS-based electronic devices show great promise with the potential to realize very high switching speeds with minimal power consumption and negligible thermal losses, actual fabrication of such devices requires solutions to a number of challenging materials-related problems. A review of some of these issues is provided, for example, by C. H. Ahn, et al. in “Electric field effect in correlated oxide systems,” Nature, 424, 1015 (2003) which is hereby incorporated by reference.
Successful fabrication of HTS electronics requires the ability to deposit ultrathin, uniform superconducting layers which are structurally perfect, free of pinholes or other defects, and have atomically smooth surfaces and interfaces. These requirements pose conflicting challenges for the ALE of HTS materials. High growth temperatures are generally required to ensure excellent crystallinity; however, higher temperatures may also lead to surface roughening and enhanced interdiffusion at film interfaces. The ability to deposit ultrathin (on the order of a few nm) layers of HTS materials with the desired stoichiometry, crystal structure, and layering sequence requires precise atomic-level control of the impinging flux during film growth. Thus far, it has proved very difficult to achieve bulk Tc values in very thin HTS films; the transitions are typically broad and the Tc is low. Another problem encountered with ultrathin HTS materials is that subsequent processing steps necessary to fabricate actual electronic devices tend to degrade the material quality.
Additional materials challenges which have hindered the development of HTS layers include improvements in film quality and reproducibility over large areas and between different deposition sequences, but under identical deposition conditions. In addition to the problems associated with fabrication of suitable HTS materials, there is a continuing and ever-present need to produce superconductors with still higher Tc. Present-day HTS devices require cooling to cryogenic temperatures in order to transit to the superconducting state. The realization of materials which superconduct at room temperature and above remains a long-standing goal of present-day materials scientists and would significantly increase the range of practical applications for this class of materials.